Developer
DTU Cyber Systems

Instruction-Set Architecture Simulator

A modular Python simulator for registers, memory, parsing, arithmetic, logic, and branching instructions.

Instruction-set simulator register and execution viewPC0x1000R00x2100R10x3200R20x4300MEM0x5400CURRENT INSTRUCTIONBRANCH R1, +04PARSE → EXECUTE → OBSERVE
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Instruction / state / executionArchitecture abstraction

The problem

Model a small instruction set clearly enough that program execution and state changes can be inspected and tested.

System architecture

  • Modular arithmetic, logic, memory, and branching instruction handling.
  • Explicit register and memory models with program parsing and execution.

Engineering decisions

  • Separate parsing from execution semantics.
  • Expose register and memory state for verification.

Testing and verification

  • Control programs and targeted test cases.

Limitations

  • A learning simulator rather than a cycle-accurate hardware model.

What I would improve next

  • Extend error reporting and trace visualisation.